TSV (Through Silicon Vias)/ Blind Vias for 3D Staking/ 2.5D Interposers

Five vertical diagrams numbered 1 to 5, showing the steps of a manufacturing or construction process with layered components in different colors like blue, yellow, cyan, and red.
Cross-section diagram of a through-silicon via (TSV) structure with labeled layers: TSV filler (Copper or Tungsten), seed layer, barrier layer, dielectric liner, and DRIE etched silicon.

At Nanosystems JP, we provide TSV fabrication services, a process that involves creating electrical connections between layers of a semiconductor device to create high-density, high-performance integrated circuits.

Typical steps, fabrication techniques & key points:

  1. High aspect ratio etching using DRIE (Deep reactive dry etching)

    • Over 100um deep

    • SiO2 hard mask

    • BOSCH process

    • Smooth (small sidewall scalloping), Uniform, vertical side wall profile

  2. Oxide deposition / Dielectric liner

  3. Barrier & seed layer deposition

    • Prevent diffusion of metal into oxide

    • High step coverage

    • Diffusion barrier

    • TiN, Ta, SiN,TiN, TiW, Ti

    • Based on electroplating Cu, Tungsten, etc., seed layer deposition by sputtering

  4. Plating & Annealing

    • Void free

    • Low stress to avoid warpage

    • Typical material Cu, Tungsten

    • No Cu mounds defects

    • Annealing at ~400C.

  5. CMP

    • Endpoint control

If you have any questions about our TSV fabrication process, please don't hesitate to contact us.

We look forward to helping you create the perfect integrated circuit for your application.

Diagram of microfabrication process steps including DRIE, oxide deposition, barrier and seed layer deposition, plating and annealing, and CMP.