Specialty Bump Services, Gold Bumps & Thermocompression Finishes

Gold Bump Services
Evaporated & Electroplated Au Bumps

At Nanosystems JP Inc., we fabricate wafer-level gold bumps via two complementary routes, thermal or e-beam evaporation with lift-off patterning for fine-pitch 1 to 5 µm bumps, and Au electroplating through a resist mold for taller 2 to 20 µm bumps. 99.99% gold, no native oxide, keeping it bondable by thermocompression, thermosonic, or ACF long after delivery with appropriate packaging and storage. 4 to 12 inch wafers, from a single wafer.

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Evaporation + lift-off Au electroplating 99.99% Au Au-Au thermocompression No stable native oxide; surface cleanliness and storage still require control ACF / COG ready Soft Au on request From 1 wafer
0
Native oxide: bondable
long after delivery with proper storage
1 to 20 µm
Bump heights across
both fabrication routes
4 to 12 inch
Wafer sizes supported
Si and compound semis
±0.5 µm
Lift-off registration
on stepper lithography
Alternative Metallurgy

Need a solder joint instead of a solid-state bond?

Gold bumps bond without melting. When the assembly needs a reflowed solder joint, hermetic AuSn and cryogenic indium are the companion services, on the same UBM, from the same flow.

AuSn Bump Services →
Why Gold Bumps

The bump that never oxidizes
and bonds without melting

We fabricate gold bumps on your wafer and deliver it ready for bonding at your facility or chosen assembly site, or in the same program through the flip-chip assembly service, or flip-chip assembly can be included in the same program. Three properties keep gold the default choice wherever solder is the wrong answer.

No Native Oxide, Ever

Gold is the only common bump metal with no native oxide. Flux is generally unnecessary, and Au-Au bonding can often run without aggressive oxide-removal chemistry. Unlike oxide-forming bump metals, gold does not grow a native oxide in storage, which keeps the practical bonding window long when wafers are packaged and stored appropriately.

No flux required Long bonding window; storage and handling limits still apply Simple logistics

Single Metal, Total Reproducibility

A gold bump is one element at 99.99% purity. There is no alloy composition to control, no intermetallic phase ratio to verify, and no melting-point shift to chase between lots. Run-to-run behavior is set by geometry, material condition, and bonding parameters, which is why gold is the reference process for research programs and for production lines that value boring, repeatable bonding. Gold is also inert and biocompatible, opening implantable and sensor applications closed to solders.

99.99% single element No composition control Lot-to-lot reproducible Inert & biocompatible

Solid-State Bonding

Gold bumps join by thermocompression or thermosonic bonding, deformation and diffusion rather than melting, so nothing flows, nothing wicks, and the joint geometry you designed is the joint geometry you get. The finished Au-Au bond is suited to elevated-temperature service where conventional solder joints may not survive. For ACF and ACP assembly, the bump serves as the pressure contact with no metallurgy at all.

Thermocompression Thermosonic Nothing melts or wicks Cryo to high temp
Two Fabrication Routes

Evaporated fine pitch and
electroplated height

Both routes deposit the same 99.99% gold; the difference is geometry and economics. Our engineers recommend the route from your pitch, height, and bonding method.

Evaporation + Lift-Off

E-BEAM / THERMAL · 1 to 5 µm · FINE PITCH

Gold is evaporated over a lift-off resist profile with a Ti or Cr adhesion layer beneath it, and dissolving the resist leaves bumps only in the defined openings. The footprint is set by the resist at ±0.5 µm registration with no undercut, which makes this the route for fine-pitch arrays, thermocompression pads on photonic and MEMS devices, and cryogenic hybridization surfaces. Typical heights run 1 to 5 µm; economics favor evaporation exactly where gold does, in thin layers and low wafer counts.

1 to 5 µm typical height Pitch to 10 µm ±0.5 µm registration Ti / Cr adhesion included Best for fine pitch & TC pads

Au Electroplating

THROUGH-RESIST · 2 to 20 µm · SOFT AU OPTION

Gold is electroplated through a resist mold onto a sputtered seed, then the resist is stripped and the seed etched, the classic route behind display-driver COG and COF bumps and every application that needs real stand-off height. Plating builds gold far taller and far faster than evaporation, and bath selection gives hardness control: soft, low-hardness gold for thermocompression deformation, or standard gold for contact and probe surfaces.

ParameterEvaporation + Lift-OffElectroplating
Bump height1 to 5 µm typical2 to 20 µm typical
Minimum pitch10 µm typical~20 µm typical
Height uniformity±5% within wafer±8% within wafer
Hardness controlAs depositedSoft Au for TC on request
Best forFine pitch, TC pads, cryoCOG/COF, tall stand-off, volume
Taller bumps: 2 to 20 µm Soft Au for TC COG / COF class Higher throughput
Route Geometry
Evaporated vs Plated Bump Profile
EVAPORATED + LIFT-OFF truncated cone · resist-defined edge 1-5µm pitch to 10µm · ±0.5µm registration PLATED THROUGH RESIST straight sidewall · mold-defined 2-20µm height and throughput win · soft Au option Not to scale. Below ~10 µm either route is practical; above ~10 µm, plating.
Bonding Modes

One bump, four ways
to use it

We fabricate the bumps; bonding runs at your facility or chosen assembly site, or in the same program through the flip-chip assembly service. Bump geometry, hardness, and surface finish are prepared for the mode you will use.

Bonding mode options
Thermocompression, thermosonic, ACF contact, or solderable base
Gold's versatility is the point: the same metallurgy serves as a diffusion bond, an ultrasonic weld, a pressure contact, and a solder-wettable surface. Tell us the mode and we prepare the bump for it.
TC
THERMOCOMPRESSION
Typ. 250 to 350 °C + pressure
Heat and pressure diffuse two gold surfaces into one solid joint. The standard for photonic die, MEMS caps, and fine-pitch flip-chip where nothing may melt. Soft Au recommended.
TS
THERMOSONIC
Lower temp + ultrasonic
Ultrasonic energy assists the bond, cutting temperature and pressure versus pure TC. Suits temperature-limited die and fast single-die attach.
ACF
ACF / ACP CONTACT
Adhesive cure temp only
The bump is the pressure contact through anisotropic conductive film or paste, no metallurgical joint at all. The COG / COF display standard and the flex-assembly workhorse.
Base
SOLDERABLE SURFACE
AuSn · In · SnAg on top
Gold bumps and pads as the wettable base for solder applied later: AuSn or indium from the companion bump services, or solder placed at your line.
99.99% gold standard on both routes
Ti or Cr adhesion under evaporated bumps; TiW/Au seed under plated, field etch included
Soft (low-hardness) gold for thermocompression on request
Profilometry height map delivered per the agreed inspection plan
SEM geometry verification standard before shipment
Bump shear test on request
Coplanarity data for ACF assembly on request
From 1 wafer; repeat lots on an established baseline recipe
Structure After Bonding
Au-Au Thermocompression, Before and After
BEFORE · placed die Au bump 1-5µm substrate · Au pad no oxide on either surface · no flux · storage and cleanliness limits apply → heat + pressure AFTER · bonded die substrate · Au pad one solid Au joint bump deforms and diffuses · nothing melts, nothing wicks Not to scale · thermocompression typ. 250-350°C + pressure · thermosonic runs cooler with ultrasonic assist
Process Specifications

Complete gold bump
fabrication parameters

ParameterEvaporation + Lift-OffElectroplating
Wafer Sizes4 to 12 inch (100 to 300 mm)
SubstratesSi, InP, GaAs, glass, sapphire; others on request
MaterialGold (Au), 99.99% purity
UnderlayerTi or Cr adhesionSputtered TiW/Au seed, field etched
Bump Height1 to 5 µm typical2 to 20 µm typical
Minimum Pitch10 µm typical, finer on request~20 µm typical
Height Uniformity±5% within-wafer±8% within-wafer
HardnessAs depositedSoft Au for TC on request
PatterningLift-offThrough-resist plating + seed etch
Alignment Accuracy±0.5 µm (stepper)±1 µm
Bonding CompatibilityAu-Au thermocompression, thermosonic, ACF/ACP, wire bond, solder base
Shelf LifeNo stable native oxide; surface cleanliness and storage still require control; long practical bonding window
InspectionProfilometry + SEM standard; shear and coplanarity on request
Minimum LotFrom 1 wafer; R&D runs to repeat lots on one baseline recipe
Applications

Gold bumps across display,
photonics, and cryo

Display Driver COG / COF

Electroplated gold bumps are the industry-standard interconnect for chip-on-glass and chip-on-flex display driver ICs, bonded through ACF at fine pitch and high I/O counts. The classic volume application for plated Au bumps, and the geometry our plated route is built around.

COG · COF · ACF · Display drivers · Fine pitch, high I/O

Photonic & MEMS Thermocompression

Au-Au thermocompression joins photonic die, MEMS caps, and wafer-level assemblies without any molten phase, so waveguide facets stay clean and released structures stay put. Evaporated fine-pitch bumps and soft plated gold both serve, matched to your bonder.

Au-Au TC · Photonic die · MEMS caps · Wafer-level bonding

Cryogenic & Quantum Assembly

Gold surfaces bond by thermocompression and stay stable and conductive to millikelvin temperatures, serving as TC hybridization pads and as the base metallization under indium bumps in cryogenic detector and quantum processor stacks.

Cryo TC · Under In bumps · Detector & qubit stacks · mK stable

RF & MEMS Contacts

Gold's low, stable contact resistance without oxide films makes it the metal for RF MEMS switches, relay contacts, and interposer contact arrays, where a joint that never forms an insulating skin is the entire requirement.

RF MEMS · Switch contacts · Interposers · Stable contact R

Biocompatible Devices

Inert, biocompatible gold bumps and pads for implantable electronics, neural and biosensor electrodes, and lab-on-chip assemblies, where solder metallurgies are excluded by chemistry or regulation.

Implantables · Biosensors · Electrode arrays · Lab-on-chip

Probe Pads & R&D Runs

Gold bumps and pads for wafer probing, test vehicles, and university or corporate R&D lots, from a single wafer, with the reproducibility that comes from a single-element metallurgy.

Probe & test · Research lots · From 1 wafer · Reproducible
Structure After Bonding
Gold Bump Through ACF
driver IC glass / flex · ITO or Cu pads plated Au bump particles trapped:conduction only under bump dispersed: insulating Not to scale · anisotropic conductive film: adhesive cure only, no metallurgical joint · the COG / COF standard
Anatomy of a Gold Bump · Cross-Section
Si / compound device waferpads and passivation up topflat top · TC / thermosonic / ACFElectroplated Au · 2 to 20 µmsputtered under-layerAl / Cu padpassivationOne footprint from photolithography: the bump is the patternNot to scale · evaporated route covers sub-5 µm bumps
Companion services: UBM Deposition · Packaging & Assembly
Why Nanosystems JP Inc.

What makes our gold bump capability
different

01

Both routes, one recommendation

Evaporated lift-off and plated gold are both offered, so the route is chosen by your pitch, height, and bonding method, not by the only tool available.

02

Hardness matched to your bonder

Soft gold for thermocompression deformation, standard gold for contacts and probing. We ask how you bond before we plate.

03

Fine pitch by lift-off

±0.5 µm stepper registration and resist-defined footprints with no undercut, the same discipline behind our AuSn and indium fine-pitch arrays.

04

Part of the bump family

Gold, AuSn, indium, and UBM run on shared lithography and deposition, so mixed programs, gold pads here, solder bumps there, stay in one flow, managed end to end by a dedicated project manager.

05

Data with each lot

Profilometry height maps and SEM verification ship with the wafers; shear and coplanarity data on request. Your bonding engineers start from measurements.

06

From 1 wafer, no minimum lot

Prototype on a single wafer, verify bonding at your line, then scale on the same recipe. That prototype data becomes the baseline for repeat production.

Related service

UBM Deposition: The Ti, Cr, and TiW/Au layers under these bumps are a service in their own right, under solder you plate, or as your finished contact metal.

UBM Deposition →

Start your project.
Initial response typically within one business day.

Share your process requirements, substrate, and production volume. A Nanosystems JP Inc. engineer will give an initial response typically within one business day. Full quote typically within 7-10 business days, subject to project complexity and NDA requirements.

To speed up technical review, please include:
substrate type & size  ·  target process  ·  quantity  ·  timeline  ·  design files if available (not required for first review)

sales@nanosystemsjp.co.jp · +81-3-5288-5569 · NDA available on request

Ready to discuss this process?
Initial engineering response: typically within one business day. NDA available.
Request a Quote →
Services & Industries
Capabilities Overview
Substrates
Substrate & WafersSi, SiC, GaN, glass, sapphire Fused Silica WafersQuartz · borosilicate · low CTE Glass ProcessingDrilling, etching, polishing PI Film & SUS Sensor FabRoll-to-roll · sensor patterning
Front-End
Mask FabricationGDS to chrome mask, DRC PhotolithographyE-beam 20 nm to 500 × 600 mm NanoimprintingUV & thermal NIL Thin Film DepositionPVD, CVD, ALD, MBE ALD CoatingConformal oxides, nitrides PECVD DielectricsSiO₂, SiN, SiON, a-Si TFT & BackplaneIGZO · Glass · Display Lift-OffMetal pattern · shadow mask ElectroplatingCu TSV fill, DPC, LIGA Electroforming & LIGANi shims, meshes, microstructures EtchingICP-RIE, DRIE >50:1 ICP-RIE EtchingSi, oxide, III-V, SiC, quartz MEMS FoundrySensors, actuators, microfluidics Microchannel CoolingEtched, bonded, heater test chips Thermal Test ChipsHeater dies, multi-zone, RTD Temperature SensorsPt/NiCr RTDs, thermocouples AnnealingN₂ / H₂ / vacuum / RTA Ion ImplantationB / P / As / Al / N implant CMP & GrindingCu CMP, 50 µm thinning Wafer ThinningTo 50 µm on carriers Backside MetallizationTi/Ni/Ag, Ti/Ni/Au, Ti/Cu Patterned Test WafersCustom CMP and process evaluation wafers Daisy-Chain Test DiesDummy dies, chains, bump options DicingBlade, stealth laser Stealth & Laser Dicing300 mm Si and glass, SDBG Wafer CleaningRCA, plasma, megasonic Cleaning ChemistryPiranha, SC-1, SC-2, RCA
Advanced Packaging
Wafer BondingHybrid, eutectic, fusion Anodic BondingGlass to silicon, cavities MEMS Cap WafersCavities, ports, seal lands, bonded TSV FabricationHigh AR, Cu fill InterposersSi and glass, TSV/TGV + RDL TSV RevealBackgrind → etch → CMP TGV FabricationThrough-glass via Glass TGV CouponsHole-only to routed prototypes RDL FabricationBCB / PBO / PI + damascene Packaging & AssemblyWire bond, flip-chip Flip-Chip BondingTC, reflow, AuSn, underfill 3D / 2.5D PackagingTSV + RDL + UBM + C4 AuSn BumpPVD lift-off, fluxless Laser SubmountsSi/AlN submounts, optical benches Indium BumpEvap lift-off · cryo/quantum UBM DepositionTi/Pt/Au · adhesion-barrier-Au Cu Pillar & SnAg BumpingPillars with SnAg caps, SnAg bumps Gold BumpEvap & plated · Au-Au TC AuGe / AuSi361/363 °C eutectic die attach High-Pb Bumps95Pb5Sn · hi-rel C4 SLID / TLPCu/Sn · Au/In · Ag/In Al-Ge Sealing424 °C · CMOS-friendly MEMS Ohmic ContactsGaAs · GaN · RTA + TLM SiC ProcessingContacts, implant, 1800 °C anneal GaN & III-VGaN, GaAs, InP processing Cryo / UHV MetalAuSn · Ti/Pd/Au · rings Optical AccessWindows · meshes · holes Vapor CellsDRIE + bond · unfilled TFOI WafersQuartz-on-Si · LNOI Biochip & MicrofluidicsGlass 500 × 600 mm, NIL SiPho PackagingTSV · RDL · UBM · C4 for PIC Photonic DevicesSiN/SOI waveguides, gratings
Industries
AI & HPC PackagingCoWoS-style, 2.5D / 3D Silicon PhotonicsSOI · AuSn · TSV interposer AutomotiveMEMS sensors, SiC power Life SciencesLab-on-chip, biosensors All Industries → Request a Quote →