Quantum Technology
Foundry Services
At Nanosystems JP Inc., the processes quantum hardware groups struggle to source, deep silicon etching, glass vias, indium and gold bumping, UHV-compatible AuSn, wafer bonding, fused silica optics, ion implantation, run as one flow, from single wafers, managed end to end by a dedicated project manager. This page maps five quantum platforms to the services that build them, and the four packaged offerings we ship most.
to one process flow
Cu fill checked by cross section
trenches and cavities
built for research groups
Trapped ions:
surface trap chips
Surface traps want thick gold electrodes, deep trenches for optical access, backside routing so wirebonds stay out of laser paths, and through-holes for beams. That is our DRIE (Bosch, 50:1), TGV, thick Au plating, and Ti/Au patterning in one program, with AuSn as the fluxless, low-outgassing die attach inside the vacuum can.
Electrodes & Routing
Thick electroplated Au electrode layers with Ti/Au lift-off patterning, backside redistribution, and double-side lithography so control wiring leaves the optical plane clear.
Trenches & Through-Holes
DRIE trenches and loading slots at 50:1 aspect ratio, plus through-substrate laser access holes, in Si or via unfilled through-glass vias.
In-Vacuum Assembly Metal
AuSn multilayer stacks for fluxless die attach on carriers, no flux and no polymer retained in the joint next to the trap; bakeout and residual gas are qualified per program.
Neutral atoms:
cells, windows, and apertures
Vapor and vacuum cells are glass-and-silicon stacks: etched Si bodies, anodic and adhesive bonding to glass, and patterned metal on transparent substrates. Our fused silica program and micron-scale metal meshes on sapphire are already neutral-atom optics parts in all but name.
Cell Bodies
DRIE cavities in silicon bonded to glass windows, anodic, adhesive, or eutectic per your stack, as sealed bodies or open halves.
Patterned Windows
Ti/Au, apertures, and fine metal meshes patterned on fused silica and sapphire, double-side where the optics demand it.
Apertures & Masks
Micron-scale apertures and beam-defining features by lift-off on transparent substrates, aligned front to back.
Photonic & quantum
communication
Waveguide-era quantum hardware runs on our photonics stack: SiN and low-temperature dielectrics, AR stacks, edge coupling and V-grooves, CMP planarization, and glass TGV interposers for driver and detector integration. These are the inquiries we already receive.
Waveguide-Safe Processing
SiN and SiO₂ films at photonics-safe temperatures, CMP planarization below 0.5 nm Ra, and facet-respecting dicing.
Interposers & Vias
Glass TGV interposers, Ø20 µm standard vias with full Cu fill, for cryo drivers, detectors, and fan-out.
Coupling Features
Edge coupling notches, V-grooves, and fiber-attach geometries etched and diced to your coupling design.
Spin qubits &
color centers
Defect engineering is ion implantation plus activation annealing plus fine lithography, on Si and SiC. Our SiC substrate experience and Ni-based lift-off contact work transfer directly; diamond programs are discussed per inquiry.
Implant & Activate
Ion implantation with species and dose per your defect recipe, followed by RTA or furnace activation in the same flow.
SiC Processing
SiC substrates procured and processed, contacts by lift-off, annealing, and the handling wide-bandgap wafers require.
Registration Features
Alignment marks, mesas, and contact patterns at stepper accuracy so single defects can be found again.
Quantum sensing:
OPMs and chip-scale clocks
The segment closest to real volume and least served by incumbent foundries. MEMS alkali vapor cells are DRIE cavities plus anodic or adhesive glass bonding plus windows, an established microfluidics and bonding flow. See the dedicated MEMS vapor cell page.
Vapor Cell Bodies
Si cavity bodies bonded to glass, delivered as open halves or bonded unfilled bodies; alkali filling by arrangement.
Optical Windows
Polished, patterned windows with apertures and coatings coordinated through the fused silica program.
Toward Volume
From single prototype pairs to repeat lots on a fixed recipe, the scaling path OPM and clock programs need.
Five platforms, one flow,
four offerings
Every platform above routes into the same shared process core, and out of it come the four packaged offerings below.
Four things quantum groups
order most
Each is a page of its own, with specs, and each orders from a single wafer.
Built the way quantum programs
actually buy
Single-wafer native
Research lots are our standard offer, not a favor. Prototype on one wafer, publish, then repeat on the same recipe.
The awkward processes, together
Deep etch, glass vias, indium, AuSn, bonding, implantation: the steps that usually mean five different quotes run here as one program.
Cryo and UHV literacy
Fluxless metallurgies, low-outgassing choices, and material selections made for vacuum cans and cryostats, not just reflow ovens.
Transparent-substrate fluency
Fused silica, sapphire, and glass are first-class substrates in this flow, patterned, drilled, bonded, and diced routinely.
One project manager, one thread
Mixed-platform programs stay coherent, managed end to end by a dedicated project manager from RFQ to shipment.
Specs on real pages
Every offering above links to a full specification page, so your design review starts from numbers, not adjectives.
Dedicated pages that start from this process
Nb and Ta films, ICP-RIE, TSV and indium or AuSn flip-chip for resonator and qubit chips; no cryogenic test, no public PDK.
Start your project.
Initial response typically within one business day.
Share your process requirements, substrate, and production volume. A Nanosystems JP Inc. engineer will give an initial response typically within one business day. Full quote typically within 7-10 business days, subject to project complexity and NDA requirements.