MEMS Cavity and
Cap Wafer Fabrication
The lid for your MEMS device, made to your layout: silicon or glass cap wafers with etched cavities, through-ports, alignment features, seal lands and metallization, delivered on their own or bonded to your device wafer.
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Caps designed with the bond in mind
A cap wafer is specified by what it must seal, what must pass through it, and how it will be joined. We design all three together so the cap arrives ready for your bonder, or comes back already bonded.
Schematic section: the seal is formed on the two perimeter lands, not across the cavity mouth; a ported cavity is not hermetic until its closure step. Cavity size, seal type and port position are set per design.
Silicon caps
DRIE or KOH cavities to a defined depth, optional through-ports and vent holes, oxide or metal seal lands; thinned where the package height is tight.
Glass caps
Borosilicate glass caps can be reviewed for anodic bonding to silicon. Fused-silica caps are reviewed separately for a compatible bonding route, which may require an intermediate structure. Cavity geometry, seal lands and allowable thermal conditions are confirmed for the selected material pair; ports and cavities are made to the same layout. See glass processing.
Seal lands and getters
AuSn, Au, Al-Ge or glass-frit seal rings patterned to your bond frame; getter deposition in the cavity for vacuum packages on request.
Bonded delivery
Aligned wafer-level bonding to your device wafer by anodic, eutectic, thermocompression or frit routes, with hermeticity testing as agreed. See wafer bonding.
MEMS Cavity and Cap Wafer Fabrication
Scope and specification options. Every figure is confirmed for your program in the quotation.
Typical ranges
| Parameter | Typical | Note |
|---|---|---|
| Cap material | Silicon 300-725 µm; borosilicate and fused silica 300-700 µm | Thinner caps on carriers |
| Cavity, silicon | Depth 10-500 µm by Bosch DRIE or KOH; through-cavity where needed | KOH profile depends on orientation and mask geometry |
| Cavity, glass | Wet etch, laser or ultrasonic machining in borosilicate or fused silica | Profile, depth and remaining thickness confirmed per glass and route |
| Ports and vents | Through-holes from 50 µm; vent channels for controlled cavity pressure | Sealed after bonding on request |
| Seal land | AuSn, Au, Al-Ge, glass frit, or bare for anodic and fusion | Ring width and metal stack per bond |
| Alignment | Marks for front-to-front and front-to-back; post-bond X/Y offset of ±5 µm is a typical target for reviewed substrate and bond-route pairs | Reference and pre- versus post-bond registration stated per program; tighter on request |
| Cavity atmosphere | Air, nitrogen, or reduced pressure at bonding; getter on inquiry | The retained cavity pressure is specified as a target with its temperature, outgassing and measurement method; a ported cavity is not hermetic until its closure step |
| Inspection | Bond interface by IR or acoustic imaging and optical inspection | Hermeticity or leak-rate testing is a separate agreed test with method, cavity size, sampling and criteria; cap-only delivery includes dimensional and film inspection unless more is agreed |
| Delivery | Cap wafers alone, bonded stacks, or diced capped devices | Dicing of bonded stacks reviewed |
From layout to capped wafers
- 01Define the capCavity map, ports, seal type, bond route, delivery format.
- 02LayoutCap GDS aligned to your device layout; returned for approval.
- 03Fabricate the capEtch cavities and ports, form seal lands, deposit getter where specified.
- 04BondAligned bonding to your device wafer, or ship caps for your bonder.
- 05Inspect and deliverBond inspection and hermeticity as agreed; wafers or diced parts.
For a cap wafer quotation
| Item | What helps |
|---|---|
| Device wafer | Material, size, topography under the seal ring, thermal budget |
| Cap layout | Cavity positions and depth, device clearance and remaining roof thickness, ports, seal ring geometry and land roughness, marks, optical requirements |
| Bond route | Preferred method or constraints, maximum process temperature and voltage, electrical feedthroughs, target cavity atmosphere |
| Delivery | Caps only, bonded, or bonded and diced |
| Quantity | Wafers and target date |
Questions engineers ask before ordering
Can you bond the cap to my device wafer?
Yes, by anodic, eutectic, thermocompression or glass-frit routes, aligned to your marks, with hermeticity testing as agreed. Caps can also ship alone for your bonder.
Can the cavity hold vacuum?
Reduced-pressure sealing and getter deposition are available on inquiry. The retained pressure is specified as a target with its measurement method; getters need an activation budget and placement review.
What do you need to quote a cap wafer?
Device wafer material and size, topography under the seal ring, thermal budget, cavity map and depth, ports, seal ring geometry, bond route, delivery format, quantity and date.
Processes usually combined with this work
Start your project.
Initial response within one business day.
Share your process requirements, substrate, and production volume. A Nanosystems JP Inc. engineer gives an initial response, typically within one business day. A written quotation typically follows within 7-10 business days after we receive the required information and complete any prerequisite NDA.